Past StudentsGraduated PhD Students7. Satyajit Mohapatra (Thesis - Linearity enhancement techniques in high resolution pipelined ADCs, Graduated in 2021). 6. Mandar Bhoir (Thesis - Advanced CMOS technologies for SoC applications: Challenges and solutions from analogRF perspectives/, Graduated in 2020), Joined Micron Technologies, Hyderabad, India. 5. Mohit Ganeriwala (Thesis - Compact electrostatic and transport model for high mobility III-V channel gate all around MOS transistors, Graduated in 2020), Joined GLOBALFOUNDRIES, Bengaluru, India. 4. Apoorva Ojha (Thesis - Compact Modeling Solutions for Advanced MOS Devices, Graduated in 2019), Joined Maxim Integrated, Bengaluru, India. 3. Pardeep Kumar (Thesis - Modeling and Optimisation Techniques for Efficient Lithography Simulation, Graduated in 2019), Joined ASML. 2. Pardeep Duhan (Thesis - Effect of Device Dimensions, Layout and Technological Parameters on the Performance and Reliability of Nano-scale HKMG Transistors,, Graduated 2017), Joined GLOBALFOUNDRIES, Singapore. Then in Fraunhofer Institute for Photonic Microsystems, Dresden. Currently working as an Assistant Professor in IIT Ropar http://www.iitrpr.ac.in/. 1. Satya Siva Naresh (Thesis - Anomalous Narrow Width Effect in Gate First High-K Metal Gate MOS Transistors, Graduated in 2016), Joined GLOBALFOUNDRIES, Singapore. Now in Intel india, Bengaluru. Past JRFs and Lab Engineers5. Diptesh Gayen (Joined University of Freiburg as a PhD student) 4. Gunamala Jain 3. Amratansh Gupta (Joined IISc Bangalore as a MTech student) 2. Soumya Ranjan Panda (Joined University of Bordeaux as a PhD student) 1. Rajesh Yadav (Joined eInfochips (An Arrow Company)) Graduated MTech Students32. Ravins Katiyar (Thesis - Device design of indigenous low-cost single, double-poly silicon bipolar transistors for Analog and RF applications, Graduated in 2021), Joined GLOBALFOUNDRIES, Bengaluru, India. 31. Pratik Sharma (Thesis - Effect of Channel Dimensions and Spacer Material on Drain Saturation Voltage of sub-10nm Wfin regime FinFETs, Graduated in 2021), Joined Synopsys Inc., Noida, UP, India. 30. Virender Dan (Thesis - Development of a scalable substrate current model for LDMOS Transistors, Graduated in 2021), Joined GLOBALFOUNDRIES, Bengaluru, India. 29. Pushpak Dhote (Thesis - Design of a clock driver circuit for CCDs using indigenous LDMOS transistors, Graduated in 2021), Joined GLOBALFOUNDRIES, Bengaluru, India. 28. Abhilash Dubey (Thesis - Numerical analysis of quantum effects in advanced Nano-sheet FETs, Graduated in 2021), Joined GLOBALFOUNDRIES, Bengaluru, India. 27.Mansi Shah (Thesis - Compact model of LDMOS transistors at low temperature, Graduated in 2021). 26. Ankit Verma (Thesis - Process induced threshold voltage variability in Ultra-Thin Body and Buried Oxide Fully Depleted Silicon on Insulator (UTBB FDSOI) transistors, Graduated in 2021), Joined GLOBALFOUNDRIES, Bengaluru, India. 25. Shubham Patil (Thesis - Development and validation of compact models for LDMOS transistors with channel doping gradient, Graduated in 2020), Joined IIT Bombay as a PhD student. 24. Rakesh Kumar Pothal (Thesis - Design of low power LDO for biomedical applications, Graduated in 2020), Joined Ceremporphic, Hyderabad, India. 23. Shubham Jain (Thesis - Investigating the analog performance of FinFETs in sub 10nm Wfin regime by analysing the drain saturation voltage, Graduated in 2020), Joined Ceremporphic, Hyderabad, India. 22. Priyanjana Pal (Thesis - Design and optimisation of high voltage drain extended FinFET transistors for analog SoC applications, Graduated in 2020), Joined GLOBALFOUNDRIES, Bengaluru, India. 21. Biplob Nath (Thesis - Parametric analysis based identification of yield detractor patterns from ULSI layouts, Graduated in 2020), Joined Redpine Signals, Bengaluru, India. 20. Piyush Dewangan (Thesis - Design of robust and low power signal processing circuit for CCD image sensors, Graduated in 2020), Joined Intel Technology India Private Limited, Bengaluru, India. 19. Sarath Chandran GM (Thesis - Charge and Capacitance Modeling of III-V Double Gate Field Effect Transistors, Graduated in 2019), Joined Intel Technology India Private Limited, Bengaluru, India. Currently working as a Compact Modeling Engineer at Austria Microsystems, Hyderabad, India. 18. Yadukrishnan M (Thesis - Redundant ADC Design and Mismatch Compensation with Calibration, Graduated in 2019), Joined Texas Instruments, Bengaluru, India. 17. Rohit Dawar (Thesis - Hotspot detection in Lithographic Patterns using Machine learning Techniques, Graduated in 2018), Joined SiliconCH Systems, Bengaluru. 16. Namrata Pandey (Thesis - Calibration of a 14-bit SAR ADC for Biomedical Applications, Graduated in 2018), Joined ON Semiconductor, Bengaluru. 15. Chakka Yaswanth Sai Kiran (Thesis - Simulation and Analysis of Contact Resistance in AlGaNGaN HEMT Devices/, Graduated in 2018), Joined SiliconCH Systems, Bengaluru. 14. Ashish Soni (Thesis - Ultra Low Power 14 bit SAR ADC for Biomedical Applications, Graduated in 2017), Joined GLOBALFOUNDRIES, Bengaluru, India. Now in Texas Instrument, Bengaluru, India. 13. Abhijit Umap (Thesis - Work function Engineering for Low Power Compact Sequential Circuit Design in FinFET Technology, Graduated in 2016), Joined Texas Instruments, Bengaluru, India. 12. Venkatesh Saripalli (Thesis - Analog Circuit Synthesis and Application, Graduated in 2016), Joined Texas Instruments, Bengaluru, India. 11. Rohit Dang (Thesis - Design and Implementation of 32x32 CMOS Image Sensor in SCLs 180nm Library, Graduated in 2016), Joined Texas Instruments, Bengaluru, India. Currently working as an Analog Design Engineer at Intel Technology India Private Limited, Bengaluru, India. 10. Manish Kumar Viswakarma (Thesis - A 14 bit 5kS per sec Low Power Asymmetric Split SAR ADC for Biomedical Applications, Graduated in 2016), Joined ON Semiconductor, India. 9. Rachita Agarwal (Thesis - Impact of Parameter Variations on the Performance of LDMOS Devices Compatible with SCLs 5V 180nm CMOS Technology, Graduated in 2016), Joined Cognizant Technologies, Bengaluru, India. 8. Jayshree Bhaijipale (Thesis - Design of Vertical PNP Transistor with beta greater than 50 using SCLs 180nm CMOS Technology, Graduated in 2016), Joined IIT Bombay as a PhD student. 7. Mandar Bhoir (Thesis - Design of Complementary High-Voltage Devices Compatible with SCLs 180nm CMOS Technology, Graduated in 2015), Joined IIT Gandhinagar as a PhD student. 6. Mohit Ganeriwala(Thesis - Analysis of Gate Leakage Current in High K Metal Gate MOS Transistors, Graduated in 2015, Research Excellence Award), Joined IIT Gandhinagar as a PhD student. 5. Ashita Chandnani (Thesis - Design and Finite Element Analysis of Micromachined Piezoresistive Polyimide Nanocantilevers for Surface Stress Sensing Applications, Graduated in 2014), Joined Boise State University as a PhD student. 4. Sharad Kumar Jain (Thesis - Effect of Device Geometries on HCI and PBTI of Gate First High-K Metal Gate NMOS Transistors, Graduated in 2014), Joined Space Application Centre, ISRO as a Scientist. 3. Narendra Parihar (Thesis - Analysis and Modeling of Stress Overlayer Induced Threshold Voltage Shift in High-K Metal Gate MOSFETs, Graduated in 2014), Joined IIT, Bombay as a PhD student. Currently working as a researcher at IMEC, Leuven, Belgium. 2. Ritesh Jain (Thesis - Terahertz detection using CMOS - Simulation studies, Graduated in 2014, President's Gold medal for scoring the highest CPI among M.Tech 2014 graduating batch at IIT Gandhinagar, Institute Gold medal for scoring highest CPI among M.Tech Electrical Engineering 2014 graduating batch at IIT Gandhinagar), Joined Institute for High Frequency Communication and Technology, BU Wuppertal, Germany as a PhD student. 1. Satyajit Mohapatra (Thesis - Design of High Resolution Low Power ADC, Graduated in 2014), Joined IIT Gandhinagar as a PhD student. Graduated BTech Students (Students who worked on my funded research projects)
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