Home
Main
News
Research
Research Area
Research Facilities
External Funding
Collaboration
National
International
Publications
Journals
Conference Proceedings
Patents
Teaching
Courses
Talks
Group
Members
Alumni
Misc
Contact
Gallery

(SELECTED) Invited Talks and Tutorials

  • “Evolution of CMOS technologies and its impact on future semiconductor devices”, Invited Lecture, IESA Gujarat Chapter.

  • “FinFET based CMOS technology for SoC applications: Challenges and Solutions from Analog Perspective”, Invited Lecture, 2nd International Conference (EDKCON 2022) on Electron devices and circuits, 16th November 2022, Kolkata, India.

  • “Device design and technology development of high voltage MOS devices for space applications”, Invited Lecture, Advanced Workshop on Semiconductor Device Design, Fabrication and Characterisation, 14th July 2022, Chandigarh, India.

  • “Silicon MOS devices for high voltage and high current applications”, Invited Lecture, International Symposium on History and Future of Transistors organised by The National Academy of Sciences India (NASI) Delhi chapter, 29th December 2021.

  • “Nano-sheet FETs for high performance computing”, Invited Lecture, XXI International workshop on Physics of Semiconductor Devices, 17th December 2021, Delhi, India.

  • “Device design and technology development of high voltage MOS devices for space applications”, Half Day Tutorial, 25th International Symposium on VLSI Design and Test (VDAT 2021), 16th September 2021, Surat, India.

  • “Design of MOS based HV devices for space applications”, Invited Lecture, Online STC on Nano-electronics Devices and Circuits, 3rd May 2021, NITTTR Chandigarh.

  • “Technology development of 7-40V MOS devices for space and defense applications”, Invited Lecture, QIP sponsored FDP organised by CAE at IIT Indore, 18th February 2021, Indore.

  • “Indigenous development of High-Voltage devices for CCD clock drivers and PMICs”, Invited Talk, 26th September 2019, 4th ISSE National Conference 2019 (INAC 2019), SAC, Ahmedabad.

  • “Modelling solutions for III-V Nanowire FETS for sub-7nm CMOS nodes”, Invited Talk, 28th April 2019, National Workshop on Modelling of Novel Nano-electronics Devices and Circuits for ULSI Technology, NIT Silchar, Sichar, India.

  • “Novel techniques for performance improvement in LDMOS transistors”, Invited Talk, 11th March 2019, Globalfoundries, Singapore.

  • “Effect of ReSURF Implant on the Performance, Variability and HCI Reliability of 15V nLDMOS Transistors”, Invited Talk, 8th March 2019, 2nd International Symposium on Devices, Circuits and Systems 2019, Hiroshima, Japan.

  • “Modeling Solutions for III-V Nanowire FETs in sub-11nm CMOS Nodes”, Invited Talk, 18th December 2018, 4th IEEE International Conference on Emerging Electronics (IEEE-ICEEE), Bangalore, India.

  • “An Effective Compact Model for Trap-Assisted Carrier Transport through Multi-stack Gate Dielectrics of HKMG nMOS Transistors”, Invited Talk, 11th June 2018, Mori Lab, Osaka University, Japan.

  • “Compact Modeling Solutions for III-V Multi-Gate Devices”, Invited Talk, 15th September 2017, IMEC, Belgium.

  • “Computational Lithography for Advanced CMOS Nodes”, Tutorial, 29th June 2017, VDAT 2017, IIT Roorkee, India.

  • “Effect of Width and Technological Parameters on the Performance and Reliability of HKMG nMOS Transistors”, Invited Talk, 2nd June 2017, Tokyo Institute of Technology, Japan.

  • “SOI CMOS Technology - Challenges and Solutions”, Invited Talk, 21st April 2017, Semiconductor Laboratory, Department of Space, Mohali, Chandigarh, India.

  • “CMOS Technology - Past, Present and Future”, Invited Talk, 24th March 2017, Government Engineering College, Gandhinagar, India.

  • “Nano CMOS Technology - Challenges and Solutions”, Invited Talk, 11th March 2017, Indo German Frontiers of Engineering (INDOGFOE) Symposium, Jaipur, India.

  • “Modeling Mechanical Stress Induced Threshold Voltage Shift in Modern MOS Transistors”, Invited Talk, 3rd March 2017, Workshop on Compact Modeling, IIT Kanpur, India.

  • “High K Metal Gate CMOS Technologies - Integration Challenges and Anomalous Device Effects”, Invited Talk, 19th November 2016, Workshop on Electron Devices (WED 16), IIIT Allahabad, India.

  • “CMOS Technology Challenges for High Performance and Low Power Circuits”, Invited Talk, 4th July 2016, VNIT Nagpur, India.

  • “Anomalous Device Effects in HKMG MOS Transistors”, Invited Talk, 30th April 2015, National Chiao Tung University, Hsinchu, Taiwan.

  • “Optical Lithography - Challenges and Oppurtunities beyound 22nm CMOS Node”, 17th September 2014, Invited Talk, IIT Madras, India.

  • “Effect of Radiation on Emerging Electronic Materials and Devices”, 26th September 2013, BARC, Mumbai, India.